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rev. a.2 - july., 2004 hpw7095/a 1 6-channel dc/dc converter control ic ? copyright hipac semiconductor, inc. www.hipacsemi.com ? ? ? ? ? supports for synchronous rectification (ch1, ch2 and ch5) ? ? ? ? ? supports for down or up-down zeta conversions (ch1 and hpw7095 ch2) ? ? ? ? ? supports for up, flyback or up-down sepic conversions HPW7095A ch2, ch3, apw7095 ch4, ch5 and ch6) ? ? ? ? ? supports for inverting conversion (HPW7095A ch4) ? ? ? ? ? low start-up voltage : 1.4v (ch6) ? ? ? ? ? power supply voltage range - ch1 to ch5 : 3.0v to 6.5v - ch6 : 2.4v to 6.5v ? ? ? ? ? 1% reference voltage accuracy ? ? ? ? ? wide operating frequency 100khz to 1mhz ? ? ? ? ? soft-start function (ch1 to 6) ? ? ? ? ? power good (pgood) indicator for ch1 ? ? ? ? ? low shutdown current ? ? ? ? ? output short-circuit detections ? ? ? ? ? digital camera ? ? ? ? ? camcorder ? ? ? ? ? hand-held instrument the hpw7095/a is a 6-channel, frequency-settable, voltage-mode, dc/dc control ic providing a complete power supply solution for high-performance portable digital cameras. the hpw7095/a uses pulse-width- modulation (pwm) and synchronous rectification for high efficiency step-up, step-down, up-down and in- verting converters with free input and output settings in 2 or 4-cell aa, 1-cell lithium-ion (li+), and dual- battery designs. the hpw7095/a incorporates error amplifiers, output short-circuit detection, under-volt- age lockout, soft-start and output switch control into a chip. the hp7095/a improves performance, compo- nent count, and size compared to conventional multi- channel controllers. the apw7095/a has a power-good indicator (pgood) that signals when ch1 output is within 10% of the set voltage by monitoring in1 pin. the hpw7095/a is available in compact 48-pin plas- tic lqfp and tqfn packages. features general description applications
rev. a.2 - july., 2004 hpw7095/a 2 ? copyright hipac semiconductor, inc. www.hipacsemi.com hpw7095/a package code qd : lqfp qb : tqfn temp. range e : -30 to 85 c handling code ty : tray lead free code l : lead free device blank : original device handling code temp. range package code xxxxx - date code hpw7095 qd/qb : hpw7095 xxxxx HPW7095A qd/qb : HPW7095A xxxxx xxxxx - date code lead free code ordering and marking information pinouts 35 34 33 32 31 30 29 28 27 26 25 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 hpw7095/a 1 2 3 4 5 6 7 8 9 10 11 12 36 swout cin6 out1-1 out1-2 out2-1 out2-2 out3 pvcc out4 pgnd out5-1 out5-2 out6 pgood fb2 dtc2 in1 fb1 dtc1 rt ct vb in3 fb3 dtc3 in2 ctl5 ctl4 ctl3 ctl1,2 ctl vcc cscp gnd vref cs dtc4 ins4 swin fb6 in6 dtc5 fb5 in5 ina4 outa4 fb4 in4 pin description pin no. name i/o description 1 sw out o output switch control circuit output pin. 2 sw in i output switch control circuit input pin. 3 fb6 o ch6 error amplifier output pin. 4 in6 i ch6 inverted input pin of error amplifier. 5 cin6 i ch6 soft-start capacitor connection pin. leave this pin ?open? to disable the soft-start function. 6 dtc5 i ch5 dead time control pin. connect this pin to vref directly when the dead-time control is not used. ic hpw7095 HPW7095A ch1 synchronous step-down synchronous step-down ch2 synchronous up-down synchronous step-up ch3 step-up step-up ch4 step-up inverting ch5 synchronous step-up synchronous step-up ch6 step-up step-up
rev. a.2 - july., 2004 hpw7095/a 3 ? copyright hipac semiconductor, inc. www.hipacsemi.com pin description (cont.) pin no. name i/o description 7 fb5 o ch5 error amplifier output pin. 8 in5 i ch5 inverted input pin of error amplifier. 9 ina4 i ch4 inverting amplifier input pin. 10 outa4 o ch4 inverting amplifier output pin. connect this pin to ina4 when the inverting amplifier is not used. 11 fb4 o ch4 error amplifier output pin. 12 in4 i ch4 inverted input pin of error amplifier. 13 ins4 i ch4 inverted input pin of short detection comparator. 14 dtc4 i ch4 dead time control pin. connect this pin to vref directly when the dead-time control is not used. 15 cs - ch1 to ch5 soft-start capacitor connection pin. leave this pin ?open? to disable the soft-start function. 16 vref o reference voltage output pin. 17 gnd p reference voltage and control circuit ground pin. 18 cscp - short-circuit detection capacitor connection pin. connect this pin to gnd with the shortest distance to disable the timer-latch short-circuit protection circuit. 19 vcc p reference voltage and control circuit power supply pin. 20 ctl i power supply and ch6 control pin. ?h? level : operation mode. ?l? level : standby mode 21 ctl1,2 i ch1 and ch2 control pin. ?h? level : operation mode. ?l? level : off mode 22 ctl3 i ch3 control pin. ?h? level : operation mode. ?l? level : off mode 23 ctl4 i ch4 control pin. ?h? level : operation mode. ?l? level : off mode 24 ctl5 i ch5 control pin. ?h? level : operation mode. ?l? level : off mode 25 rt - oscillator freq uency setting resistor connection pin. 26 ct - oscillator freq uency setting capacitor connection pin. 27 vb o triangular wave oscillator regulator output pin. 28 in3 i ch3 inverted input pin of error amplifier. 29 fb3 o ch3 error amplifier output pin. 30 dtc3 i ch3 dead time control pin. connect this pin to vref directly when the dead-time control is not used. 31 in2 i ch2 inverted input pin of error amplifier. 32 fb2 o ch2 error amplifier output pin. 33 dtc2 i ch2 dead time control pin. connect this pin to vref directly when the dead-time control is not used. 34 in1 i ch1 inverted input pin of error amplifier. 35 fb1 o ch1 error amplifier output pin. 36 dtc1 i ch1 dead time control pin. connect this pin to vref directly when the dead-time control is not used. 37 out1-1 o ch1 main-side mosfet drive pin. connect out1-1 to the main mosfet. 38 out1-2 o ch1 mosfet drive pin for synchronous rectifier. 39 out2-1 o ch2 main-side mosfet drive pin. apw 7095 : drive a p-channel mosfet for a step-down converter. apw 7095a : drive an n-channel mosfet for a step-up converter. 40 out2-2 o ch2 mosfet drive pin for synchronous rectifier
rev. a.2 - july., 2004 hpw7095/a 4 ? copyright hipac semiconductor, inc. www.hipacsemi.com pin description (cont.) pin no. name i/o description 41 out3 o ch3 mosfet drive pin. 42 pvcc p drive circuit power supply pin. 43 out4 o ch4 mosfet drive pin. apw 7095 : drive an n-channel mosfet for a step-up converter. apw 7095a : drive a p-channel mosfet for a inverting step-up/down converter. 44 pgnd p drive circuit ground pin. 45 out5-1 o ch5 main-side mosfet drive pin. connect out5-1 to the main mosfet. 46 out5-2 o ch5 mosfet drive pin for synchronous rectifier. 47 out6 o ch6 mosfet drive pin. 48 pgood o indicator output pin. this pin is an open-drain output used to indicate status of the ch1 output voltage.
rev. a.2 - july., 2004 hpw7095/a 5 ? copyright hipac semiconductor, inc. www.hipacsemi.com block diagram drive 2-1 drive 1-1 drive 1-2 ch1 pwm controller cs ctl logic osc sc p uvlo 2v cs vb rt ct cscp vref gnd 2.49v 1.25v 1.0v 1.25v 1.0v 1.0v 1.25v 1.0v 1.0v 0.9v vb:2 v 0.9v 1.25v x1.1 1.25v x0.9 comp. er r o r amp. sc p comp. err or amp . sc p comp. err or amp . sc p comp. er r o r amp . sc p comp. in v amp . 1.25v err or amp . sc p comp. 1.25v err o r amp . sc p comp. ref po w e r on/off ctl 37.5k 62.5k ct2 ct1 ct ct2 ct2 ct2 ct1 ct1 ct dtc1 fb1 dtc2 fb2 dtc3 fb3 dtc4 fb4 dtc5 fb5 fb6 in 1 scp control so ft- sta r t ctl1,2 ctl1,2 ctl3 ctl4 ctl5 uvlo ch2 pwm controller ch3 pwm controller ch4 pwm controller ch5 pwm controller ch6 pwm controller (max. duty=80%) driver 1-1 driver 1-2 driver 2-1 driver 2-2 driver 3 driver 4 driver 5-1 driver 5-2 driver 6 fb1 in1 dtc1 fb 2 in2 dtc2 fb3 in3 dtc3 ina4 outa 4 fb4 in4 ins4 dtc4 fb5 in5 dtc5 fb6 in6 ctl1,2 ctl3 ctl4 ctl5 cin6 out1-1 pvcc out1-2 out2-1 out2-2 out3 out4 out5-1 out5-2 out6 pgnd swin vcc ctl swout p good 0.8v 0.3v 1.8v 1.1v 1.8v 1.1v po w e r comp.
rev. a.2 - july., 2004 hpw7095/a 6 ? copyright hipac semiconductor, inc. www.hipacsemi.com absolute maximum ratings symbol parameter rating unit v cc vcc supply voltage (vcc to gnd) -0.3 ~ 7 v v pvcc pvcc supply voltage (pvcc to gnd) -0.3 ~ 7 v in1~6, ina4, ins4, dtc1~5 input voltages -0.3 ~ v cc +0.3 v ctl, ctl1~5, swin input voltages -0.3 ~ 7 v pgood pull high voltage -0.3 ~ 7 v maximum junction temperature 150 o c t stg storage temperature -65 ~ 150 o c t sdr maximum soldering temperature, 10 seconds 300 o c thermal characteristics symbol parameter value unit ja junction-to-ambient resistance in free air 48-pin plastic qfp qfn 80 o c/w recommended operating conditions hpw7095/a symbol parameter condition min. typ. max. unit v cc start-up power supply voltage ch6 1.4 - 6.5 v ch6 2.4 5.0 6.5 v cc operating voltage ch1 to ch5 3.0 5.0 6.5 v i ref reference voltage output current vref pin -1 - 0 ma i b vb output current vb pin -0.5 - 0 ma in1 to in5, ina4, ins4 pins 0 - v cc v in input voltage in6 pin 0 - v cc v v ctl control voltage ctl pin 0 - 6.5 v out pin (ch1 to ch5) - 2 15 out pin (ch6) - 2 15 i o output current swout pin - 1 4 ma f osc oscillator frequency 100 500 1000 khz c t timing capacitor 47 100 560 pf r t timing resistor 8.2 18 100 k ? c s ch1 to ch5 - 0.027 1.0 c cin6 soft-start capacitor ch6 - 0.47 1.0 f c scp short detection capacitor - 0.1 1.0 f c vb vb pin capacitor 0.082 0.1 - f t a operating ambient temperature -30 25 85 o c
rev. a.2 - july., 2004 hpw7095/a 7 ? copyright hipac semiconductor, inc. www.hipacsemi.com electrical characteristics hpw7095/a symbol parameter test condition min. typ. max. unit i ccs vcc standby current ctl=0v - - 10 i pvcc pvcc standby current ctl=0v - - 10 a i cc vcc nominal supply current ctl, ctl1 to ctl5=5v - 1.8 5 ma under voltage lockout v th threshold voltage rising v cc 2.5 2.7 2.9 v h hysteresis width - 0.2 - v rst ch1 to ch5 reset voltage falling v cc 1.2 1.3 1.4 v th ch6 threshold voltage rising v cc 1.25 1.4 1.55 v reference voltage v ref reference voltage i ref =0ma 2.46 2.49 2.51 v ? v ref / v ref output voltage temperature stability t a =-30c to 85c - 0.5 - % line input stability v cc =3.0v to 6.5v -10 - 10 mv load load stability i ref =0ma to ?1ma -10 - 10 mv i os short-circuit output current v ref =2v -25 -18 -1 ma soft-start v stb input standby voltage - 50 100 mv i cs soft-start charge current -1.4 -1.0 -0.6 a short-circuit detection v th threshold voltage 0.65 0.70 0.75 v v stb input standby voltage - 50 100 mv v i input latch voltage - 50 100 mv i cscp input source current -1.4 -1.0 -0.6 a triangular wave oscillator f osc oscillator frequency ct=100pf, rt=18 ? ,vb=2v 450 500 550 khz ? f/fdv frequency stability for voltage vcc=3v to 6.5v - 1 10 % ? f/fdt frequency stability for temperature t a = -30c to 85c - 1 - % error amplifier (ch1 to ch5) v th threshold voltage fb=1.45v 1.23 1.25 1.27 v ? v t / v t v t temperature stability t a = -30c to 85c - 0.5 - % i b input bias current in=0v (ch1 to ch5) -50 - - na a v voltage gain dc 60 100 - db bw frequency bandwidth a v =0db - 1.0 - mhz v oh maximum output voltage 4.9 4.99 - v v ol minimum output voltage - 3 50 mv i source output source current fb=1.45v - -25 -10 ma i sink output sink current fb=1.45v 5 16 - ma error amplifier (ch6) v th threshold voltage fb=0.55v 1.24 1.26 1.28 v ? v th / v th v th temperature stability t a = -30c to 85c - 0.5 - % i b input bias current in6=0v -50 - - na refer to the typical application circuit. these specifications apply over, v cc =5v and t a = -30 to 85 c, unless other- wise specified. typical values refer to t a =25 c.
rev. a.2 - july., 2004 hpw7095/a 8 ? copyright hipac semiconductor, inc. www.hipacsemi.com electrical characteristics (cont.) hpw7095/a symbol parameter test condition min. typ. max. unit a v voltage gain dc 60 75 - db bw frequency bandwidth a v =0db - 1.0 - mhz v oh maximum output voltage 4.9 4.99 - v v ol minimum output voltage - 3 50 mv i source output source current fb=0.55v - -50 -10 ma i sink output sink current fb=0.55v 60 120 - a inverted amplifier (ch4) v io input offset voltage out=1.25v -10 0 10 mv i b input bias current in=0v -50 - - na a v voltage gain dc 60 100 - db bw frequency bandwidth av=0db - 1.0 - mhz v oh maximum output voltage 4.9 4.99 - v v ol minimum output voltage - 3 50 mv i source output source current out=1.25v - -26 -1.0 ma i sink output sink current out=1.25v 5 16 - ma short detect comparator (ch1 to ch5) v th threshold voltage ch1 to ch5 0.97 1.00 1.03 v in=0v (ch1 to ch3, ch5) -50 - - i b input bias current ins4=0v (ch4) -50 - - na short detect comparator (ch6) v th threshold voltage 0.8 0.9 1.0 v pwm comparator (ch1 to ch5) v t0 duty=0% 1.0 1.1 - v t100 threshold voltage duty=100% - 1.8 1.9 v i dtc input current dtc=0.4v (ch1 to ch5) -50 - - na pwm comparator (ch6) v t0 duty=0% 0.2 0.3 - v tmax threshold voltage duty=max. - 0.74 0.84 v d tr maximum duty cycle ct=100pf, rt=18k ? 70 80 90 % pwm controller driver for p-mos (ch1,ch2,ch5) i source output source current duty 5%, out=0v - -130 -80 i sink output sink current duty 5%, out=5v 100 160 - ma r oh out= -15ma - 18 30 r ol output on resistance out= 15ma - 10 20 ? pwm controller driver for n-mos (ch1,ch2,ch5,ch6) i source output source current duty 5%, out=0v - -130 -80 i sink output sink current duty 5%, out=5v 100 160 - ma r oh out= -15ma - 18 30 r ol output on resistance out= 15ma - 10 20 ? pwm controller driver for p-mos (ch3,ch4) i source output source current duty 5%, out=0v - -290 -180 i sink output sink current duty 5%, out=5v 300 470 - ma r oh out= -15ma - 7 15 r ol output on resistance out= 15ma - 4 10 ? refer to the typical application circuit. these specifications apply over, v cc =5v and t a = -30 to 85 c, unless other- wise specified. typical values refer to t a =25 c.
rev. a.2 - july., 2004 hpw7095/a 9 ? copyright hipac semiconductor, inc. www.hipacsemi.com electrical characteristics (cont.) hpw7095/a symbol parameter test condition min. typ. max. unit output switch control (sw) v ih swout=?l? level 1.2 - 6.5 v il sw input voltage swout=?h? level 0 - 0.5 v i swin input current swin=5v - 2.5 20 a i source output source current swout=0v - -7 - ma i sink output sink current swout=5v - 19 - ma r oh out= -4ma - 325 400 r ol output on resistance out= 4ma - 85 150 ? power good v th in1 upper threshold voltage rising in1 - 110 - % v th in1 lower threshold voltage rising in1 - 94 - % upper/lower hysteresis - 2 - % v pgood pgood output voltage i pgood = 4ma - 0.17 0.8 v control block (ctl, ct1 to ct5) v ih active mode 1.5 - 6.5 v il ctl input voltage standby mode 0 - 0.5 v i ctl input current ctl=5v - 2.6 20 a refer to the typical application circuit. these specifications apply over, v cc =5v and t a = -30 to 85 c, unless other- wise specified. typical values refer to t a =25 c.
rev. a.2 - july., 2004 hpw7095/a 10 ? copyright hipac semiconductor, inc. www.hipacsemi.com 2.44 2.46 2.48 2.50 2.52 2.54 2.56 -40-200 20406080100 0 1 2 3 4 5 012345678 typical characteristics 0 1 2 3 4 5 012345678 0 1 2 3 4 5 012345 reference voltage vs. ambient temperature reference voltage, v ref (v) ambient temperature, t a ( c) reference voltage vs. control voltage power supply current vs. power supply voltage reference voltage current vs. power supply voltage power supply voltage, v cc (v) power supply voltage, v cc (v) control voltage, v ctl (v) reference voltage, v ref (v) reference voltage, v ref (v) power supply current, i cc (ma) v cc =5v t a =25 c v cc =5v t a =25 c i ref =0ma t a =25 c v cc =5v t a =25 c i ref =0ma ctl=ctl1,2=ctl3=ctl4=ctl5=5v ctl=ctl1,2=ctl3=ctl4=ctl5=5v ctl=ctl1,2=ctl3=ctl4=ctl5=5v i ref =0ma
rev. a.2 - july., 2004 hpw7095/a 11 ? copyright hipac semiconductor, inc. www.hipacsemi.com 0 1 2 3 4 5 012345678 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 200 400 600 800 1000 1200 10 100 1000 10000 10 100 1000 10000 10 100 1000 10000 1 10 100 1000 typical characteristics (cont.) oscillator frequency vs. timing capacitor oscillator frequency, fosc(khz) timing capacitor, ct(pf) oscillator frequency, fosc(khz) oscillator frequency vs. timing resistor control current vs. control voltage triangular wave upper & lower threshold voltages vs. oscillator frequency control current, i ctl ( a) upper & lower threshold voltage, v ct (v) timing resistor, rt(k ? ) control voltage, v ctl (v) oscillator frequency, fosc(khz) v cc =5v t a =25 c v cc =5v t a =25 c rt=4.3k ? rt=18k ? rt=100k ? ct=47pf ct=100pf ct=220pf ct=470pf ct=1000pf v cc =5v t a =25 c rt=18k ? v cc =5v t a =25 c vtl, ctl1,2~ctl5 upper lower
rev. a.2 - july., 2004 hpw7095/a 12 ? copyright hipac semiconductor, inc. www.hipacsemi.com 440 460 480 500 520 540 560 -40 -20 0 20 40 60 80 100 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -40 -20 0 20 40 60 80 100 oscillator frequency vs. ambient temperature typical characteristics (cont.) oscillator frequency, fosc(khz) ambient temperature, t a ( c) v cc =5v upper & lower threshold voltage, v ct (v) triangular wave upper & lower threshold voltages vs. ambient temperature ambient temperature, t a ( c) upper lower ctl=ctl1,2=ctl3=ctl4=ctl5=5v rt=18k ? ct=100pf v cc =5v rt=18k ? ct=100pf
rev. a.2 - july., 2004 hpw7095/a 13 ? copyright hipac semiconductor, inc. www.hipacsemi.com vvv 1.vbat=2.7v~6v (4-cell battery or 1-cell li-ion) for 2 buck and 4 boost converter (using apw7095) driver hpm2301a hpm2300a ch1 buck controller 1.25v vref q1 q2 driver ch2 buck controller 1.25v vref driver ch3 boost controller 1.25v vref driver ch4 boost controller 1.25v vref driver ch5 boost controller 1.25v vref driver ch6 boost controller 1.26v vref 1.8v/300ma out1-1 out1-2 in1 fb1 hpm2301a hpm2300a q3 q4 3.3v/300ma out2-1 out2-2 in2 fb2 hpm2300a q5 15v/20ma out3 -10v/20ma fb3 in3 swout fb6 in6 out6 fb5 in5 out5-2 fb4 in4 out4 5v 5v/300ma dtc1 dtc2 dtc3 cin6 outa4 ina4 ins4 dtc4 dtc5 hpw7095 vcc 7.5v/20ma pgnd vref vref vref vref vref ctl ctl1,2 ctl3 ctl4 ctl5 swin pgood cs vb rt ct cscp gnd vref vref vbat vbat 5v vbat vbat vbat c1 r1 d1 c2 r2 r3 c3 r4 r5 c4 l1 l2 c5 l3 c6 r6 r7 r8 r9 r10 d2 c7 c8 c9 c10 c11 c12 t1 d3 d4 r11 r12 r13 r14 r15 r16 c13 c14 c15 c16 c17 c18 c21 c20 c19 q6 d5 r17 r18 r19 q7 r21 r20 r23 r22 r24 c22 c23 c24 c25 l4 l5 q8 q9 q10 d6 r25 r26 r27 r28 r31 r29 l6 c26 c28 c27 q11 d7 out5-1 pvcc hpm2312 hpm2301a hpm2300a hpm2301a hpm2301a hpm2300a ss0520 ss12 ss12 ss12 ss12 ss12 ss12 22uf 100uf 22uh 0.1uf 1k 6.8k 15k 24k 47k 22uf 10uf 22uh 22uh 100uf 0.1uf 24k 1k 15k 18k 47k 22uf 22uf 22uf 4700pf 0.1uf 1k 165k 15k 18k 47k 0.22uf 100pf 30k 0.1uf 0.1uf 0.33uf 1k 100k 309k 0.1uf 22uh 22uf 22uf 22uf 24k 47k 100k 1k 300k 0.1uf 22uf 22uf 22uf 22uh 24k 47k 22uf 22uf 22uh 0 15k 75k 0.1uf 1k typical applications
rev. a.2 - july., 2004 hpw7095/a 14 ? copyright hipac semiconductor, inc. www.hipacsemi.com typical applications (cont.) 2.vbat=1.4v~3v (2-cell battery) for 1 buck , 1 inverting and 4 boost converter s (using apw7095a) driver hpm2301a hpm2300a ch1 buck controller 1.25v vref q1 q2 driver ch2 boost controller 1.25v vref driver ch3 boost controller 1.25v vref driver ch4 inverting controller 1.25v vref driver ch5 boost controller 1.25v vref driver ch6 boost controller 1.26v vref 1.8v/300ma hpm2300a q4 4v/300ma hpm2300a q5 15v/20ma 18v/3ma 5v 3.3v/300ma -7.5v/20ma vref vref vref vref vref ctl ctl1,2 ctl3 ctl4 ctl5 swin pgood vref 3.3v ( from ch5 ) vbat 5v vbat vbat vbat c1 r1 d1 c2 r2 r3 c3 r4 r5 c4 l1 l2 c6 r6 r7 r8 r9 r10 d2 c7 c8 c9 c10 c11 c12 d3 d4 r11 r12 r13 r14 r15 r16 c13 c14 c15 c16 c17 c18 c21 c20 c19 q6 d5 r17 r18 r19 q7 r21 r20 r23 r22 r24 c22 c23 c24 c25 l3 l4 q8 q9 q10 d6 r25 r26 r27 r28 r30 r31 r29 l5 c26 c28 c27 q11 d7 hpm2312 hpm2301a hpm2300a hpm2301a hpm2301a hpm2301a ss0520 ss12 ss0520 ss12 ss12 ss12 ss12 22uf 100uf 22uh 0.1uf 1k 6.8k 15k 24k 47k 22uf 22uh 100uf 0.1uf 33k 1k 15k 18k 47k 22uf 22uf 22uf 1uf 0.1uf 1k 165k 15k 18k 47k 0.22uf 100pf 30k 0.1uf 0.1uf 0.33uf 1k 100k 309k 0.1uf 22uh 22uf 22uf 22uf 24k 47k 15k 1k 24k 0.1uf 22uf 22uf 22uf 22uh 24k 47k 22uf 22uf 22uh 0 10k 10k 60k 0.1uf 1k hpm2301a q3 c5 1uf l6 22uh 3.3v d8 ss0520 HPW7095A out1-1 out1-2 in1 fb1 out2-1 out2-2 in2 fb2 out3 fb3 in3 swout fb6 in6 out6 fb5 in5 out5-2 fb4 out4 dtc1 dtc2 dtc3 cin6 outa4 ina4 ins4 dtc4 dtc5 vcc pgnd cs vb rt ct cscp gnd vref out5-1 pvcc in4
rev. a.2 - july., 2004 hpw7095/a 15 ? copyright hipac semiconductor, inc. www.hipacsemi.com function descriptions general the hpw7095/a provides voltage-mode feedback con- trols for six dc/dc pwm converters(ch1 to ch6). each channel operates with an error amplifier, pwm comparator, short-circuit comparator, on/off con- trol and output driver. an internal temperature-com- pensated voltage provides reference voltages for each channel. an triangular-wave oscillator(ct) with a tim- ing resistor and capacitor generates triangular waves to each channel. a inverting amplifier(ch4) cooper- ates with the error amplifier for an inverting converter (with negative output voltage) . reference voltage the hpw7095 outputs a temperature- compensated reference voltage(2.49v) at vref pin. it is regulated from the voltage at vcc pin and can source current of max. 1ma to external loads. it also supplies bias for the ic?s internal circuitry. triangular-wave oscillator the triangular-wave oscillator is designed to gener- ates a triangular oscillation signal (ct) with amplitude of 0.3v~0.8v at ct pin, providing signal to ch6. the oscillator frequency is settable from 100khz to 1mhz and set by a timing resistor and a timing capacitor connected respectively from rt and ct pins to ground. additional two triangular oscillation signals (ct1 and ct2) are also internally generated with amplitude of 1. 1v~1.8v. the ct1 is in phase with the ct to the pwm comparators of ch2 and ch4; the ct2 is out of phase with the ct to the pwm comparators of ch1, ch3 and ch5. error amplifier the error amplifier is designed with unit-gain-bandwidth of 1mhz and to satisfy wide application requirements. it works with enternal resistor-capacitor network for each converter?s feedback compensation. the loop gain can be set by connecting a feedback resistor and capacitor from the output pin(fb) to inverted input pin of the error amplifier for stable operations. inverting amplifier (inv amp) the inverting amplifier detects the inverting dc/dc con- verter output voltage (as a negative voltage) and out- puts a control signal to the error amp. channel control function the channel control function turns on/off one or more channels depending on the states (?h? or ?l? level) at ctl, ctl1,2 to ctl5 pins. the on/off control logic is shown as the following table: vol tage level at ctl pin channel on/off state ctl ctl1,2 ctl3 ctl4 ctl5 power /ch6 ch1 /ch2 ch3 ch4 ch6 l x x x x off( standby state) loff l h off on loff l h h off on on loff l h off on loff l h h h off on on on loff l h off on loff l h h off on on loff l h off on loff h h h h h on on on on on channel on/off setting table vol tage level at ctl pin channel on/off state ctl ctl1,2 ctl3 ctl4 ctl5 power /ch6 ch1 /ch2 ch3 ch4 ch6 l x x x x off( standby state) loff l h off on loff l h h off on on loff l h off on loff l h h h off on on on loff l h off on loff l h h off on on loff l h off on loff h h h h h on on on on on channel on/off setting table mosfet drive circuits hpw7095/a uses push-pull configuration at output of each mosfet driver for providing large drive current to mosfet gate. the following table shows the mosfets connected to the drivers: ic hpw7095 HPW7095A ch1 out1-1 : pmos out1-2 : nmos out1-1 : pmos out1-2 : nmos ch2 out2-1 : pmos out2-2 : nmos out2-1 : nmos out2-2 : pmos ch3 out3 : nmos out3 : nmos ch4 out4 : nmos out4 : pmos ch5 out5-1 : nmos out5-2 : pmos out5-1 : nmos out5-2 : pmos ch6 out6 : nmos out6 : nmos
rev. a.2 - july., 2004 hpw7095/a 16 ? copyright hipac semiconductor, inc. www.hipacsemi.com (1) to (2) : ch6 soft-start interval (3) : vref output start (4) to (5) : ch1 to ch3 soft-start interval (6) to (7) : ch4, ch5 soft-start interval (6)' to (7)' : ch4(ch5) soft start interval as ctl4 (ctl5) go "h" from "l" during ch1 to ch3 soft start interval (1) (3) (2) (4) 2v ctl input vb output cin6 ch6 output voltage (vo6) vref cs ch1 to ch3 output voltages (vo1 to vo3) 0.9v 2.49v 1.25v ctl1,2 ctl3 ctl4 ctl5 1.25v t ch4 to ch5 output voltages (vo4 to vo5) (5) (6) (7) (6)' (7)' function descriptions (cont.) timer-latch short-circuit protection circuit the short-circuit protection comparator in each chan- nel (ch1 to ch5) monitors converter?s output voltage via input pin of error amplifier. in ch6, the short-circuit comparator detects the voltage at output of error amplifier. as any detected voltages of ch1 to ch5 falls below 1.0v or the detected voltage of ch6 is larger than 0.9v, the timer circuits is actuated to start charg- ing the external capacitor c scp connected from cscp pin to ground. when the rising voltage of c scp reaches 0.7v, the ic turns off all external mosfets and pulls up the voltage at swout pin. then the ic is latched. applying a signal from ?l? to ?h? to ctl pin enables operation again. the short-circuit detection function remains working during soft start operation on ch1 to ch5. under-voltage lockout (uvlo) circuit the under-voltage lockout circuit monitors the supply voltage at vcc pin to prevent wrong logic control. the ic starts operation after the supply voltage rises above it?s rising threshold. as the supply voltage falls below it?s falling threshold, the ic turns off the external mosfets and pulls up the voltage at swout pin. soft-start operation the soft-start function controls the output voltage rate of rise to limit the current surge at start-up. for ch1 to ch5, the soft-start interval is programmed by the soft-start capacitor, c s connected from cs pin to ground and charged by an internal 1 a current source. for ch6, a soucing current from the internal resistor- divider charges the capacitor, c cin6 connected from cin6 pin to ground, providing soft-start control. figure 1 and 2 show the soft-start processes. in figure 1, when all control pins (ctl, ctl1,2 to ctl 5) are driven high (?h? level) at the same time, the voltage at cin6 pin starts to rise up by charging the capacitor c cin6 , starting a soft-start operation on ch6. after the rising voltage at cin6 reaches 0.9v, the reference volt- age starts to regulate and the internal source current starts to charge the c s , starting a soft-start operation on ch1 to ch5. during soft-start interval, the error amplifiers compares the ch1 to ch5 output voltage to the voltage at the cs pin. when any control pins (ch1, 2 to ch5) go ?h? from ?l? during the soft-start interval (ch1 to ch5), the output rises rapidly to follow the rising voltage at cs pin. figure 1 soft-start waveforms figure 2 soft-start waveforms (1) (3) t (2) (4) 2v ctl ctl1,2 ctl3 ctl4 ctl5 input vb output cin6 ch6 output voltage (vo6) vref cs ch1 to ch5 output voltages (vo1 to vo5) 0.9v 2.49v 1.25v (1) to (2) : ch6 soft-start interval (3) : vref output start (3) to (4) : ch1 to ch5 soft-start interval
rev. a.2 - july., 2004 hpw7095/a 17 ? copyright hipac semiconductor, inc. www.hipacsemi.com function descriptions (cont.) output switch control circuit the output switch control circuit outputs a signal to control external p-channel mosfets for preventing reactive current flow to external step-up circuits on ch5 and ch6. when a ?h? level signal is applied to swin pin after releasing the uvlo and the voltage at cin6 pin rises above 0.9v(typical), the ic pulls low the voltage at swout pin, turning on the external p-channel mosfets to generate output voltages. application information soft-start interval settings the ch6 soft-start time depends on the capacitor c cin6 and is determined as the following equation: ? ? ? ? ? ? ? ? ? ? = (v) 1.26 (v) v 1 ln ) (k 100 (k 62.5 ) (k 37.5 (f) c - (s) ts ) cin6 cin6 ? ? ? c cin6 cin6 v cin6 vb(2v) error amp. 6 37.5k 62.5k f) ( c 0.07 (s) ts cin6 ? the soft-start time until ch6 output voltage reaches 95% of the set voltage is determined as the following equation: on ch1 to ch5, the soft-start time depending on the capacitor c s determined as the following equation : triangular oscillator frequency setting the triangular oscillator frequency set by the timing capacitor (ct) connected to the ct pin and the timing resistor (rt) connected to the rt pin determined as the following equation: f) ( c 1.25 (s) ts s ? (pf) ct ) (k rt 900000 (khz) f osc ? ? the output voltage is set by the external resistor-di- vider connected with converter output, error amplifier input, and ground. (1) ch1 to ch3, ch5 in 1 v o error amp. 1 1.25 v r1 r2 ? ? ? ? ? ? + ? = r2 r1 1 1.25v (v) vo (2) ch4 r2 r1 1.25v - (v) vo ? = in4 v o er ror amp. 4 1.2 5v r1 r2 inv amp. 4 r3 out a4 ina4 (3) ch6 ? ? ? ? ? ? + ? = r2 r1 1 1.26v (v) vo cin6 vb(2v) error amp. 6 37.5k 62.5k in 6 v o r1 r2 time constant setting for timer-latch short-cir- cuit protection circuit the time constant for timer-latch short-circuit protec- tion is set by the capacitor c scp and determined as the following equation : f) ( c 0.70 (s) t scp pe ? =
rev. a.2 - july., 2004 hpw7095/a 18 ? copyright hipac semiconductor, inc. www.hipacsemi.com application information (cont.) dead-time setting the dead-time control pin (dtc) is designed to set the maximum on duty of the main-side mosfet. when the device is set for step-up inverted output based on the step-up or step-up/down zeta method or flyback method, the fb pin voltage may reach and exceed the triangular wave voltage due to load fluctuation. if this is the case, the output mosfet is fixed to a on duty of 100 %. to prevent this, set the maximum duty of the output mosfet. connecting a resistor- divider between vref, dtc and gnd pins provides a volt- age v dtc to dtc pin. when the the voltage at the dtc pin is higher than the triangular wave voltage (ct1/ 2), the output transistor is turned on. the maximum duty is calculated as the following equation: dtc1 vref r1 r2 v dtc (%) 100 v 0.7 v 1.1 - v duty on dtc (max ) ? = ref dtc v r2 r1 r2 (v) v ? + = where v ref is the output of the reference voltage (2. 49v typical) at vref pin. the amplitude of the trian- gular waves ct1 and ct2 are typically 0.7v from 1. 1v to 1.8v.
rev. a.2 - july., 2004 hpw7095/a 19 ? copyright hipac semiconductor, inc. www.hipacsemi.com lqfp-48 package information millimeters inches dim min. max. min. max. a - 1.600 - 0.0630 a1 0.050 0.150 0.0020 0.0059 a2 1.400 0.05 0.0551 0.0020 b 0.200typ 0.0078typ c 0.127typ 0.0050typ d 7.000 0.100 0.2756 0.0039 e 7.000 0.100 0.2756 0.0039 e 0.500typ 0.0196typ hd 9.000 0.250 0.3543 0.0098 he 9.000 0.250 0.3543 0.0098 l 0.600 0.150 0.0236 0.006 l1 1.000ref 0.0393ref y - 0.100 - 0.0039 0 7 0 7 he 24 1 12 48 37 36 25 hd aa2 a1 l1 l 13 detail "e" c e e b "e" d
rev. a.2 - july., 2004 hpw7095/a 20 ? copyright hipac semiconductor, inc. www.hipacsemi.com package information tqfn-48 millimeters inches dim min. max. min. max. a 0.80 1.00 0.03 0.04 a1 0 0.05 0 0.002 a2 0 1.00 0 0.04 a3 0.20ref 0.008ref b 0.18 0.30 0.007 0.01 d 7bsc 0.28bsc d2 4.15 5.25 0.09 0.21 e 7bsc 0.28bsc e2 4.15 5.25 0.09 0.21 e 0.50bsc 0.02bsc l 0.30 0.50 0.01 0.01 e d l b e2 d2 2 1 47 48 13 14 15 1 6 17 18 1 9 20 21 22 23 24 4 8 47 46 45 4 4 43 42 4 1 40 39 38 37 1 8 6 5 4 3 2 7 9 10 11 12 36 29 31 32 33 34 35 30 28 27 26 25 a3 a a1 e a2
rev. a.2 - july., 2004 hpw7095/a 21 copyright hipac semiconductor, inc. www.hipacsemi.com t 25 c to peak tp ramp-up t l ramp-down ts preheat tsmax tsmin t l t p 25 temperature time critical zone t l to t p q physical specifications reflow condition (ir/convection or vpr reflow) classificatin reflow profiles sn-pb eutectic assembly pb-free assembly profile feature large body small body large body small body average ramp-up rate (t l to t p ) 3 q c/second max. 3 q c/second max. preheat - temperature min (tsmin) - temperature mix (tsmax) - time (min to max)(ts) 100 q c 150 q c 60-120 seconds 150 q c 200 q c 60-180 seconds tsmax to t l - ramp-up rate 3 q c/second max tsmax to t l - temperature(t l ) - time (t l ) 183 q c 60-150 seconds 217 q c 60-150 seconds peak temperature(tp) 225 +0/-5 q c 240 +0/-5 q c 245 +0/-5 q c 250 +0/-5 q c time within 5 q c of actual peak temperature(tp) 10-30 seconds 10-30 seconds 10-30 seconds 20-40 seconds ramp-down rate 6 q c/second max. 6 q c/second max. time 25 q c to peak temperature 6 minutes max. 8 minutes max. note: all temperatures refer to topside of the package. measured on the body surface. terminal material solder-plated copper (solder material : 90/10 or 63/37 snpb), 100%sn lead solderability meets eia specification rsi86-91, ansi/j-std-002 category 3.
rev. a.2 - july., 2004 hpw7095/a 22 ? copyright hipac semiconductor, inc. www.hipacsemi.com test item method description solderability mil-std-883d-2003 245 c, 5 sec holt mil-std-883d-1005.7 1000 hrs bias @125 c pct jesd-22-b,a102 168 hrs, 100 % rh, 121 c tst mil-std-883d-1011.9 -65 c~150 c, 200 cycles esd mil-std-883d-3015.7 vhbm > 2kv, vmm > 200v latch-up jesd 78 10ms, 1 tr > 100ma reliability test program 7x7mm shipping tray
rev. a.2 - july., 2004 hpw7095/a 23 ? copyright hipac semiconductor, inc. www.hipacsemi.com contact hipac semiconductor, inc. 2540 north first street, suite 308 san jose, ca 95131-1016 u.s.a. tel: 1-408-943-0808 fax: 1-408-943-0878 e-mail: info@hipacsemi.com

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